（１）　　K.Kawarada, Y.Yamamoto et.al. :"New modes of operation in Plasma-coupled devices", Proc. 4th conf. on Solid State Devices, Tokyo, (1972)

（２）　　T.Suzuki, Y.Yamamoto et.al. :"Recent advances in the Plasma-coupled device", Proc. 5th conf. on Solid State Devices, Tokyo, (1973)

（３）　　Y.Yamamoto :"A new type of transistor with application for high sensitive imaging", Proc. 7th conf. on Solid State Devices, Tokyo, (1975)

（４）　　T.Shibata, Y.Yamamoto et.al. :"Application of plasma coupled device to solid state image sensors", Proc. 7th conf. on Solid State Devices, Tokyo, (1975)

（５）　　Y.Yamamoto, et.al. : "A 1.5Nsec 1K bit bipolar RAM", The Europian solid-state circuit conference ESSCIRC'83, digest of technical papers, September 21-23, pp.93-96, (1983)

（６）　　Y.Kobayashi, Y.Yamamoto et.al. : " A new bipolar transistor structure for very high speed VLSI" VLSI symposium (1984)

（７）　　H.Miyanaga, Y.Yamamoto et.al. : "A 1.1ns access time 4Kb bipolar RAM using super self-aligned technology", 1984 symposium on VLSI technology, digest of technical papers, San-diego, U.S.A., pp.50-51 (1984)

（８）　　S.Konaka, Y.Yamamoto et.al, "A 30ps Si bipolar IC using super self-aligned process technology", extended abstracts of the 16th conference on solid state devices and materials, Kobe, pp.209-212,

(1984)

（９）　　H.Miyanaga, Y.Yamamoto et.al. : "A 0.85-ns 1kbit ECL RAM",Extended abstracts of the 16th conference on silid state devices and materials, Kobe, pp.225-228 (1984)

（１０）　T.Sakai, Y.Yamamoto et.al. : "Prospects of SST technology for high speed LSI", IEDM-85 Digest of technical paper, pp.18-21, (1985)

（１１）　M.Hirata, Y.Yamamoto et.al. : "A bipolar Gbit/s 8*8bit S/P , P/S converter LSI", Extended astracts of the 18th conference on solid state device and materials, Tokyo, pp.271-274, (1986)

（１２）　Y.Tanabe, Y.Yamamoto et.al. : "Device structure and electrical characteristics of SST-CMOS", Extended astracts of the 19th conference on solid state device and materials, Tokyo, pp.343-346, (1987)

（１３）　H.Kyuragi, Y.Yamamoto et.al. :"Deep subhalf-micron BiCMOS technology using synchrotron X-ray lithography and its application to 58ps 2V CMOS gate array", 1992 Symposium on VLSI Technology, digest of Technical Papers, pp.26-27 (1992)

（１４）　 H. Inokawa, Y.Yamamoto et. al.., "Ultranarrow Trench-isolated 0.2um CMOS and its Application to ultralow-power frequency divider", 1993-International Electron Device Meeting, Dig. Tech. Paper, pp.887-890, (1993)